
Silicon Test Engineering Manager
職缺摘要
技術需求
學歷要求
Bachelor
職缺描述
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Design, implement, and manage Integrated Circuit (IC) product bring-up, verification, and characterization programs for NPI, including ATE test programs, load boards, and probe cards using ATE platforms such as UFLEX or 93K.
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Collaborate with vendors and internal teams to engineer high-volume ATE manufacturing solutions tailored for advanced packaging.
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Execute product and Defective parts per million (DPPM) correlation between ATE and system-level environments for new products.
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Enhance test coverage and resolve various failure modes via troubleshooting on ATE and System Level Testing (SLT) systems.
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Direct production sustaining activities, including program upgrades, yield optimization, test time reduction, lot disposition, and Return Merchandise Authorization (RMA) analysis.
Minimum qualifications:
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Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
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10 years of experience in the semiconductor industry.
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5 years of experience managing IC qualification, production releases, and system-level testing, with a focus on data review, yield enhancement, and test time.
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Experience with integrated circuit (IC) testing, and in Yield and Bin Pareto analysis.
Preferred qualifications:
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Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, or related degree.
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Experience in semiconductor processing, VLSI product or test engineering, with SLT, and using the advantest platform.
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Experience with ATE platforms (Teradyne UltraFlex SoC and Advantest 93K), with knowledge of high-speed interfaces (DDR, PCIe, SERDES).
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Understanding of design for testing (DFT) methodologies, including memory BIST, JTAG, Scan/ATPG, and testing for PVT and temperature sensors.
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Understanding of advanced packaging technologies such as InFO and 2.5D.
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Ability to utilize data analysis tools (O+, Datapower, or JMP).