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Ambarella
VLSI Design Verification Engineer
新竹正職不限IC 設計發布:2026-04-23
職缺摘要
職責開發並執行複雜 SoC/IP 驗證計畫;建立測試平台、斷言與覆蓋率模型;與架構師、設計師及後矽團隊合作
領域AI 邊緣運算視覺處理器,SoC 驗證
技能SystemVerilog、UVM、覆蓋率導向驗證、斷言驗證、AI 輔助工具
亮點使用 AI 驅動的驗證流程,參與下一代 SoC 設計
學歷要求
None
職缺描述
AI Vision Processors For Edge Applications:
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.:
Job Description
We are looking for talented engineers to join our VLSI Verification team. You’ll work on next-generation SoCs, applying advanced verification methodologies (SystemVerilog/UVM, coverage-driven, assertion-based) and leveraging AI-assisted tools to accelerate testplan writing, assertion development, and debug.
Responsibilities
- Develop and execute verification plans for complex SoCs/IPs
- Build testbenches, assertions, and coverage models
- Collaborate with architects, designers, and post-silicon teams
- Ensure correctness and reliability of cutting-edge designs
Why Join Us
- Cutting-edge verification with AI-powered flows
- Work alongside global world-class engineers
- Accelerated growth in a learning-driven culture If you are smart, curious, and eager to learn, join us and shape the future of silicon innovation!