Ambarella
VLSI Design Verification Engineer
新竹正職不限硬體工程發布：2026-04-23
職缺摘要
•職責：開發與執行複雜 SoC/IP 驗證計畫、建置 testbench 與 assertions、與架構師及設計師協作確保設計正確性與可靠度
•領域：AI Vision Processor 邊緣應用 SoC 驗證、SystemVerilog/UVM 高階驗證方法論
•技能：SystemVerilog、UVM、Coverage-driven verification、Assertion-based verification、AI-assisted 驗證工具、Testbench 開發、SoC/IP 驗證
•亮點：應用 AI 加速驗證流程的次世代 SoC 驗證職缺，適合對前沿驗證方法論有熱情的工程師
技術需求
SystemVerilogUVMCoverage-driven verificationAssertion-based verificationSoC verificationTestbenchAI-assisted verification tools
學歷要求
None
職缺描述
AI Vision Processors For Edge Applications:
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.:
Job Description
We are looking for talented engineers to join our VLSI Verification team. You’ll work on next-generation SoCs, applying advanced verification methodologies (SystemVerilog/UVM, coverage-driven, assertion-based) and leveraging AI-assisted tools to accelerate testplan writing, assertion development, and debug.
Responsibilities
- Develop and execute verification plans for complex SoCs/IPs
- Build testbenches, assertions, and coverage models
- Collaborate with architects, designers, and post-silicon teams
- Ensure correctness and reliability of cutting-edge designs
Why Join Us
- Cutting-edge verification with AI-powered flows
- Work alongside global world-class engineers
- Accelerated growth in a learning-driven culture If you are smart, curious, and eager to learn, join us and shape the future of silicon innovation!