Ambarella

VLSI Physical Design / APR Engineer

新竹正職不限硬體工程發布：2026-04-23

職缺摘要

•職責：VLSI 先進製程實體設計實現、晶片 floorplanning 及時序與信號完整性等設計收斂、先進製程設計流程開發

•領域：AI Vision Processors、邊緣運算應用、2nm 及以下先進製程 VLSI 設計

•技能：VLSI 設計、ASIC 設計流程、Innovus、ICC2、實體設計、Timing Closure、Signal Integrity、Power Integrity、DFM、Physical Verification

•亮點：從事 2nm 以下尖端製程的晶片實體設計，適合有 VLSI 基礎並具 EDA 工具經驗的工程師

VLSIASICAPRInnovusICC22nmEDAFloorplanningTiming ClosureSignal Integrity

None

AI Vision Processors For Edge Applications:

Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.:

Job Description

Job Description:

VLSI Advance Technology Node (2nm and Below) Physical Design Implementation.
Comprehensive scope to touch, including chip floorplanning, a variety of design closures on timing, signal integrity, power integrity, DFM as well as physical verifications.
Develop physical design flows/solutions on the cutting edge technology node.

Job Requirements:

Good communication skill, enthusiasm, responsible, opened minded and team work spirit.
Studied VLSI design related courses.
Familiar with industrial ASIC design flow is a plus.
Had the experience on the EDA tool of Innovus or ICC2 is a plus.