Cadence
Software Engineer II
新竹正職3-5年軟體工程發布：2026-05-18
職缺摘要
•職責：開發與強化 Genus Synthesis Solution 合成引擎、設計與驗證合成演算法以改善時序、面積與功耗指標、與跨功能團隊協作整合先進技術
•領域：IC 設計工具、邏輯合成、功率效能面積最佳化(PPA)
•技能：C、TCL、邏輯合成、演算法設計、EDA 工具
•亮點：參與 Cadence 核心 EDA 工具 Genus 開發，優化 IC 設計 PPA 指標
技術需求
CTCL邏輯合成合成演算法EDA功率最佳化時序分析面積最佳化
學歷要求
None
職缺描述
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.:
Position Overview:
We are seeking talented software engineers to join our team working on the Genus Synthesis Solution. The position focuses on developing and enhancing synthesis engines to achieve better power, performance, and area (PPA) in integrated circuit designs.
Key Responsibilities:
- Design, implement, and validate innovative synthesis algorithms to improve key design metrics such as timing, area, and power.
- Collaborate closely with cross-functional teams to develop and integrate advanced techniques into our tools.
- Address growing customer demands for enhanced power, performance, and area (PPA).
Qualifications:
- Strong programming skills, especially in C++.
- Solid understanding of logic synthesis.
- Familiarity with TCL scripting is a plus.
- Excellent problem-solving abilities and attention to detail.
- Ability to work effectively in a collaborative environment.
We’re doing work that matters. Help us solve what others can’t.: