Cadence
Software Engineer II
新竹正職1-3年軟體工程發布：2026-05-18
職缺摘要
職責設計與驗證創新的邏輯合成演算法；與跨部門團隊合作整合先進技術；改善時序、面積與功耗
領域EDA 邏輯合成，Genus Synthesis Solution
技能C、TCL、邏輯合成、PPA 最佳化
亮點參與業界領先的 EDA 合成工具開發，直接影響晶片設計的 PPA 指標
學歷要求
None
職缺描述
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.:
Position Overview:
We are seeking talented software engineers to join our team working on the Genus Synthesis Solution. The position focuses on developing and enhancing synthesis engines to achieve better power, performance, and area (PPA) in integrated circuit designs.
Key Responsibilities:
- Design, implement, and validate innovative synthesis algorithms to improve key design metrics such as timing, area, and power.
- Collaborate closely with cross-functional teams to develop and integrate advanced techniques into our tools.
- Address growing customer demands for enhanced power, performance, and area (PPA).
Qualifications:
- Strong programming skills, especially in C++.
- Solid understanding of logic synthesis.
- Familiarity with TCL scripting is a plus.
- Excellent problem-solving abilities and attention to detail.
- Ability to work effectively in a collaborative environment.
We’re doing work that matters. Help us solve what others can’t.: