
Cadence
Principal Software Engineer
新竹正職5+年軟體工程發布:2026-04-23
職缺摘要
職責開發 DFT/ATPG 軟體工具、優化軟體架構與演算法
領域測試自動化軟體 — DFT/ATPG、設計驗證、EDA 工具鏈
技能C/C++、Unix/Linux、Scripting、靜態/動態程式碼分析工具、演算法、電腦架構、多執行緒、分散式軟體
亮點VLSI/DFT/ATPG 專業經驗需求;Modus Test 核心產品線;演算法優化定義架構機會
學歷要求
Master
職缺描述
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.:
Cadence Design Systems is looking for a highly motivated engineer to work with the Modus Test R&D team working on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG) Software.
What You'll Be Doing
- Work as a team to build reliable, scalable and high performance software that are easy to use by engineers worldwide
- Develop software tools in C/C++ to support DFT/ATPG
- Research and develop software solutions to allow greater efficiency in software architecture and algorithm optimizations
What We Need To See
- MS/PhD in Computer Engineering, Computer Science, Electrical Engineering, or equivalent.
- 2+ years of experience in software development using C/C++.
- Experienced with modern C++, Unix/Linux and scripting
- Experienced with static and dynamic code analysis tools
- Solid understanding of algorithms, computer architecture and computer science theory
- Passionate about SW development processes
- Flexibility/adaptability for working in a dynamic environment with different frameworks and requirements
- Excellent communication, interpersonal and customer collaboration skills
Ways To Stand Out From The Crowd
- Experience in VLSI and/or DFT/ATPG.
- Experience with multi-threading and distributed software
- Experience in algorithmic and computational software
We’re doing work that matters. Help us solve what others can’t.: